.include "../platforms/pic14bit.asmdef"
#Testing all opcodes for 14bit Microchip PIC

#.opcode "W\+=R([0-9]{1,3})" "00 00 0111 0aaa aaaa" "REG" #ADDWF
W+=R0x1F
#.opcode "R\+=R([0-9]{1,3})" "00 00 0111 1aaa aaaa" "REG" #ADDWF
R4+=R4
#.opcode "R([0-9]{1,3})\+=R([0-9]{1,3})" "00 00 0111 1aaa aaaa" "REG" "SAME1" #ADDWF
R7+=R7
#.opcode "W=W AND R([0-9]{1,3})" "00 00 0101 0aaa aaaa" "REG" #ANDWF
W=W AND R100
#.opcode "R=W AND R([0-9]{1,3})" "00 00 0101 1aaa aaaa" "REG" #ANDWF 
R=W AND R0
#.opcode "R([0-9]{1,3})=W AND R([0-9]{1,3})" "00 00 0101 1aaa aaaa" "REG" "SAME1" #ANDWF 
R5=W AND R5
#.opcode "R([0-9]{1,3})=0" "00 00 0001 1aaa aaaa" "REG" #CLRF
R10=0
#.opcode "W=0" "00 00 0001 0000 0000" #CLRW
W=0
#.opcode "W=!R([0-9]{1,3})" "00 00 1001 0aaa aaaa" "REG" #COMF
W=!R123
#.opcode "R=!R([0-9]{1,3})" "00 00 1001 1aaa aaaa" "REG" #COMF
R=!R112
#.opcode "W=R([0-9]{1,3})-1" "00 00 0011 0aaa aaaa" "REG" #DECF" 
W=R23-1
#.opcode "R=R([0-9]{1,3})-1" "00 00 0011 1aaa aaaa" "REG" #DECF" 
R=R10-1

#.opcode "IF W=R([0-9]{1,3})-1" "00 00 1011 0aaa aaaa" "REG" #DECFSZ
IF W=R5-1
#.opcode "IF R=R([0-9]{1,3})-1" "00 00 1011 1aaa aaaa" "REG" #DECFSZ
IF R=R5-1
#.opcode "W=R([0-9]{1,3})\+1" "00 00 1010 0aaa aaaa" "REG" #INCF
W=R100+1
#.opcode "R=R([0-9]{1,3})\+1" "00 00 1010 1aaa aaaa" "REG" #INCF
R=R100+1
#.opcode "IF W=R([0-9]{1,3})+1" "00 00 1111 0aaa aaaa" "REG" #INCFSZ

#IF W=R20+1
#.opcode "IF R=R([0-9]{1,3})+1" "00 00 1111 1aaa aaaa" "REG" #INCFSZ
#IF R=R20+1
#.opcode "W=W OR R([0-9]{1,3})" "00 00 0100 0aaa aaaa" "REG" #IORWF" 
W=W OR R13
#.opcode "R=W OR R([0-9]{1,3})" "00 00 0100 1aaa aaaa" "REG" #IORWF" 
R=W OR R40

#.opcode "W=R([0-9]{1,3})" "00 00 1000 0aaa aaaa" "REG" #MOVF
W=R100
#.opcode "R=R([0-9]{1,3})" "00 00 1000 1aaa aaaa" "REG" #MOVF
R=R100
#.opcode "R([0-9]{1,3})=W" "00 00 0000 1aaa aaaa" "REG" #MOVFW
R40=W

#.opcode "NOP" "00 00 0000 0000 0000" "REG" #NOP
NOP
#.opcode "W=R([0-9]{1,3})<<" "00 00 1101 0aaa aaaa" "REG" #RLF
W=R10<<
#.opcode "R=R([0-9]{1,3})<<" "00 00 1101 1aaa aaaa" "REG" #RLF
R=R10<<

#.opcode "W=R([0-9]{1,3})>>" "00 00 1100 0aaa aaaa" "REG" #RRF
W=R10>>
#.opcode "R=R([0-9]{1,3})>>" "00 00 1100 1aaa aaaa" "REG" #RRF
R=R10>>
#.opcode "W=R([0-9]{1,3})-W" "00 00 0010 0aaa aaaa" "REG" #SUBWF" 
W=R40-W
#.opcode "R=R([0-9]{1,3})-W" "00 00 0010 1aaa aaaa" "REG" #SUBWF" 
R=R100-W
#.opcode "W=SWAP R([0-9]{1,3})" "00 00 1110 0aaa aaaa" "REG" #SWAPF
W=SWAP R0
#.opcode "R=SWAP R([0-9]{1,3})" "00 00 1110 1aaa aaaa" "REG" #SWAPF
R=SWAP R9

#.opcode "W=W XOR R([0-9]{1,3})" "00 00 0110 0aaa aaaa" "REG" #XORWF" 
W=W XOR R5
#.opcode "R=W XOR R([0-9]{1,3})" "00 00 0110 1aaa aaaa" "REG" #XORWF" 
R=W XOR R10

#.opcode "R([0-9]{1,3}).([0-9]{1,3})=0" "00 01 01bb baaa aaaa" "REG" "ABS" #BCF
R120.3=0
#.opcode "R([0-9]{1,3}).([0-9]{1,3})=1" "00 01 00bb baaa aaaa" "REG" "ABS" #BSF
R120.3=1
#.opcode "IF R([0-9]{1,3}).([0-9]{1,3})" "00 01 10bb baaa aaaa" "REG" "ABS" #BTFSC
IF R10.4
#.opcode "IF !R([0-9]{1,3}).([0-9]{1,3})" "00 01 11bb baaa aaaa" "REG" "ABS" #BTFSS
IF !R10.4
#.opcode "W\+=([0-9]{1,3})" "00 11 1110 aaaa aaaa" "ABS" #ADDLW
W+=123
#.opcode "W=W\+([0-9]{1,3})" "00 11 1110 aaaa aaaa" "ABS" #"ADDLW
W=W+123
#.opcode "W=W AND ([0-9]{1,3})" "00 11 1001 aaaa aaaa" "ABS" #ANDLW
W=W AND 255
#.opcode "W=AND ([0-9]{1,3})" "00 11 1001 aaaa aaaa" "ABS" #ANDLW
W=AND 255
#.opcode "CALL ([0-9]{1,4})" "00 10 0aaa aaaa aaaa" "ABS" #CALL
CALL 0xFF
#.opcode "CLRWDT" "00 00 0000 0110 0100" #CLRWDT
CLRWDT

#.opcode "GOTO ([0-9]{1,4})" "00 10 1aaa aaaa aaaa" "ABS" #GOTO
GOTO 1023
#.opcode "W=W OR ([0-9]{1,3})" "00 11 1000 aaaa aaaa" "ABS" #"IORLW" 
W=W OR 3
#.opcode "W=OR ([0-9]{1,3})" "00 11 1000 aaaa aaaa" "ABS" #IORLW" 
W=OR 3
#.opcode "W=([0-9]{1,4})" "00 11 00aa aaaa aaaa" "ABS" #MOVLW
W=102
#.opcode "RETI" "00 00 0000 0000 1001" #RETFIE
RETI
#.opcode "RET ([0-9]{1,3})" "00 11 0100 aaaa aaaa" "ABS" #"RETLW
RET 200
#.opcode "RET" "00 00 0000 0000 1000" #RETURN
RET
#.opcode "SLEEP" "00 00 0000 0110 0011" #SLEEP
SLEEP
#.opcode "W=([0-9]{1,3})-W" "00 11 1100 aaaa aaaa" "ABS" #SUBLW
W=12-W
#.opcode "W=W XOR ([0-9]{1,3})" "00 11 1010 aaaa aaaa" "ABS" #XORLW
W=W XOR 0x64
#.opcode "W=([0-9]{1,3}) XOR W" "00 11 1010 aaaa aaaa" "ABS" #XORLW 
W=0x64 XOR W
